发明名称 |
SYSTEM AND METHOD FOR EARLY WRITE TO MEMORY BY HOLDING BITLINE AT FIXED POTENTIAL |
摘要 |
A system and method is disclosed for writing early within a memory cycle by holding only one of a true bitline (BTO) and a reference bitline (BC0) at a fixed potential, e.g. ground, when the sense amplifier (51) is set. The sense amplifier (51) amplifies a small voltage difference between the true bitline (BT0) and the reference bitline (BC0) to predetermined high and low voltage logic levels to write a datum to the memory cell. In this way, writing can complete in about the same time as reading, without risking corruption of data on adjacent bitlines in the memory. The bitlines are precharged to a fixed potential in a conduction path through the bitswitches (T1), rather than using local precharge devices at the sense amplifier (51). To write, bitswitches (T1) and writepath transistors (T3) apply the fixed potential to one of the true bitline (BT0) and the reference bitline (BC0). Bitswitches (T1) on such other memory cells not currently being written isolate the bitline coupled to those memory cells when setting the sense amplifiers, such that the stored contents of such memory cells not being written are refreshed (written back) at the time that the selected memory cell is written.
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申请公布号 |
WO03003376(A1) |
申请公布日期 |
2003.01.09 |
申请号 |
WO2001US47677 |
申请日期 |
2001.12.10 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BARTH, JOHN, E., JR.;PILO, HAROLD |
分类号 |
G11C11/407;G11C7/12;G11C7/22;G11C11/4091;G11C11/4094;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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