| 摘要 |
A digital signal processing circuit having a memory for storing a digital signal obtained from a playback channel; a controller for writing the digital signal in the memory at a first rate and reading out the digital signal from the memory at a second rate lower than the first rate; and a processor for executing a desired process relative to the digital signal thus read out from the memory. The digital signal is written in the memory at a first rate by the controller and is read out therefrom at a second rate lower than the first rate. And then a desired signal process is executed relative to the digital signal read out from the memory. Therefore the required digital processing rate becomes lower than the transmission rate of the playback channel, whereby the transmission rate can be raised despite the condition that the time required for the desired signal process such as demodulation is rendered longer.
|
