发明名称 MASK PATTERN DESIGN METHOD
摘要 PURPOSE: To provide a mask pattern design method for easily and rapidly designing a mask pattern free from a dimensional error caused by a difference of a resist film thickness due to the level difference part of a base layer. CONSTITUTION: The mask pattern design method of applying the resist film on an inter-layer insulation film with a wiring groove formed, and forming a via-hole forming resist pattern on the resist film formed on the wiring groove by using the mask pattern, comprises a process of setting a corrected groove wiring data layer C in a prescribed dimension position inward from the side edge of a grove wiring data layer A for forming the wiring groove, a process of defining a product aggregation data layer E by taking the product of the original via data layer B and the auxiliary aggregation data layer D of the corrected groove wiring data layer C, a process of defining an enlarged data layer F by increasing the planar dimension of the auxiliary aggregation data layer E by a prescribed quantity, and a process of forming an area where the original via data layer B and the enlarged data layer F overlaid each other as the final corrected via data layer G.
申请公布号 KR20020097030(A) 申请公布日期 2002.12.31
申请号 KR20020034669 申请日期 2002.06.20
申请人 NEC ELECTRONICS CORPORATION 发明人 MATSUMOTO AKIRA
分类号 G03F1/08;G03F1/36;G03F1/68;G03F1/70;H01L21/027;H01L21/311;H01L21/768;H01L21/82;(IPC1-7):H01L21/027 主分类号 G03F1/08
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