发明名称 Circuit modeling
摘要 The present invention is directed to a system and method of modeling electrical circuits. The present invention may provide improved software for predicting microchip interconnect delays, and in general for an improved semiconductor manufacturing models. Further, the invention may provide for accurate prediction of resistance, capacitance and inductance for interconnections in a semiconductor, allowing for both environmental values and process variations.
申请公布号 US6502230(B1) 申请公布日期 2002.12.31
申请号 US20010847460 申请日期 2001.05.02
申请人 LSI LOGIC CORPORATION 发明人 GRAEF STEFAN;SHREEDHARAN SHEELA
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
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