发明名称 CMOS PROCESS
摘要 <p>An integrated circuit structure for MOS-type devices comprising a silicon substrate of a first conductivity type; a first gate insulating regions selectivelyplaced over the silicon substrate of the first conductivity type; a first polycrystallinesilicon layer selectively placed over the silicon substrate of the first conductivity type;a second gate insulating regions selectively placed over the first gate insulating regionsand the first polycrystalline silicon layer; a second polycrystalline silicon layer selectivelyplaced over the second gate insulating regions; first buried silicon regions of a second conductivity type, buried within the silicon substrate of the first conductivity type, placedunder the first polycrystalline silicon layer and in contact therewith; and second buriedsilicon regions of the second conductivity type, buried within the silicon substrate of the first conductivity type, placed under the second gate insulating regions, under the secondpolycrystalline silicon layer and insulated therefrom.</p>
申请公布号 WO2002103785(A2) 申请公布日期 2002.12.27
申请号 US2002019074 申请日期 2002.06.13
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