| 摘要 |
Over-sampled timing signal jitter tolerance is improved in a q-times over-sampled architecture by phase-sampling the timing signal to produce a plurality of input phase samples ~in, where ~in .epsilon. {~1,~2,...,~q). An output phase value ~out = ~in is initialized for each input sample ~in. A difference vector d i is derived for each input sample ~in, where d i = F j(n,k). F denotes a vector operation, n is the number of input samples, k is a pre-defined threshold value, and j represents a filter order value. A predefined scaling coefficient ai is applied to each difference vector d i to produce a corresponding set of scaled difference vectors a i d i. The scaled difference vectors are summed: The output value ~out is incremented by 1 if d j > k; decremented by 1 if d j < -k; and maintained unchanged if -k .ltoreq. d j .ltoreq. k. Finally , the output value ~out is selected to represent the input sample ~in.
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