发明名称 METHOD FOR FORMING CMOS SEMICONDUCTOR DEVICE WITH DUAL GATES
摘要 PROBLEM TO BE SOLVED: To provide a method for forming a CMOS semiconductor device with dual gates. SOLUTION: Over the entire surface of element isolation is formed, a 1st gate insulating film and a 1st metal-containing film are stacked in order. In a 2nd impurity type transistor region, the 1st metal-containing film and 1st gate insulating film are removed. In the 2nd impurity type transistor region, a 2nd gate insulating film and a 2nd metal-containing film are stacked. The 1st and 2nd metal-containing films are patterned to form 1st and 2nd gate electrodes in the 1st and 2nd impurity type transistor regions. At this time, when the impurity type of the 1st impurity type transistor region is a P-type, the Fermi levels of the 1st metal-containing film have energy levels close to the balanced band levels of silicon which is heavily doped with P-type an impurity.
申请公布号 JP2002359295(A) 申请公布日期 2002.12.13
申请号 JP20020107118 申请日期 2002.04.09
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KIM WOO-SIK;LEE NAE-IN
分类号 H01L21/28;H01L21/8238;H01L27/092;H01L29/423;H01L29/43;H01L29/49;(IPC1-7):H01L21/823 主分类号 H01L21/28
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