发明名称 |
Test mode matrix circuit for an embedded microprocessor core |
摘要 |
<p>A test mode matrix circuit in an integrated circuit switches signal lines internal to the integrated circuit in a manner that allows an embedded microprocessor within the integrated circuit to be fully functionally tested using standard test vectors applied to the integrated circuit, and which allows for debugging the code written for an embedded microprocessor core by connecting an in-circuit emulator (ICE) to the integrated circuit. The test mode matrix circuit operates in a number of mutually exclusive modes, each of which is suitably selected via control signal inputs to the test mode matrix. The test mode matrix circuit couples signals from the embedded microprocessor to the application-specific logic without passing through off-chip drivers/receivers. Multiple microprocessors and corresponding test mode matrices may also be implemented on the same integrated circuit. <IMAGE></p> |
申请公布号 |
EP0758113(B1) |
申请公布日期 |
2002.12.11 |
申请号 |
EP19960305207 |
申请日期 |
1996.07.16 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHERICHETTI, CORY ANSEL;COLYER, PETER STEWART;STAUFFER, DAVID ROBERT |
分类号 |
G06F11/22;G01R31/3185;G06F11/267;G06F15/78;H01L23/52;(IPC1-7):G06F11/267 |
主分类号 |
G06F11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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