| 摘要 |
It is object to provide an oversampling circuit and a digital-to-analog converter which have small circuit scales and component costs of which are reduced. The data input at predetermined intervals is multiplied by the multiplying section 1 by four types of multiplicators, and the multiplication results are cyclically held in data holding sections 2-1 through 2-4. The data selectors 3-1 through 3-4 sequentially read out the four types of multiplication results held in the data holding sections 2-1 through 2-4 one to one corresponding respectively to the data selectors 3-1 through 3-4 in a predetermined order, thereby outputting predetermined step functions. Each step function corresponding to each of the four pieces of data inputted sequentially is generated at a different timing, each of the integrating sections 4-1 through 4-4 performs a digitally integrating process two times on each step function, and the results are added up, thereby performing the oversampling process to give a pseudo-rise of a sampling frequency to each piece of input digital data.
|
