发明名称 Method and system of testing a chip
摘要 A method and system of testing a chip for testing a circuit module in the chip. The system is integrated into the chip. The reference clock and the test command are sent to the testing system serially. The testing system, in response to the test command, performs test actions on the circuit module, producing a test result. The test result is serially sent to the test machine.
申请公布号 US6483338(B2) 申请公布日期 2002.11.19
申请号 US20000734559 申请日期 2000.12.13
申请人 VIA TECHNOLOGIES, INC. 发明人 WENG CHIH-HSIEN;SHIAO JAN-SHIAN;HUANG WEN-HSU
分类号 G01R31/319;(IPC1-7):G01R31/26;G01R31/02;H01H31/02 主分类号 G01R31/319
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