| 摘要 |
PURPOSE: An 8-port VDSL(Very high speed Digital Subscriber Line) subscriber interface device is provided to commonly use a VDSL service at a low price by providing the VDSL service to a plurality of subscribers through a UTOPIA(Universal Test and Operations PHY Interface for ATM(Asynchronous Transfer Mode)) level 2 type in a DSLAM(Digital Subscriber Line Access Multiplexer) installed in a telephone office. CONSTITUTION: An ATM cell bus interface unit(100) receives demultiplexed ATM cell data from an upper server through a cell bus, multiplexes the received ATM cell data, and transmits the multiplexed ATM cell data. The ATM cell bus interface unit(100) receives multiplexed ATM cell data, demultiplexes the received ATM cell data, and transmits the demultiplexed ATM cell data to the upper server. A plurality of VDSL processing units(200) receive the multiplexed ATM cell data from the ATM cell bus interface unit(100), convert the received ATM cell data into analog DMT(Discrete Multi Tone) data, and transmit the analog DMT data to a subscriber side through a twisted pair line. A plurality of VDSL processing units(200) receive analog DMT data from the subscriber side, convert the received DMT data into ATM cell data, and transmit the ATM cell data to the ATM cell bus interface unit(100). A plurality of VDSL processing units(200) receive an up/down data change request signal, and adjust the transmission speed of up/down data. A device controller(300) receives the request for checking the state of a board, the use confirmation of a user, and a board connection state, checks the state of each board, confirms the use of the user, and confirms the board connection state. The device controller(300) transmits the confirmed result again. A host controller(400) transmits the up/down data change request signal to a plurality of VDSL processing units(200). The host controller(400) requests the check for the state of the board, the use confirmation of the user, and the board connection state to the device controller(300), receives the checked result from the device controller(300), and displays the received result to an operator. An external interface unit(500) connects the host controller(400) to an external debugging device for monitoring a board debugging and a board state.
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