发明名称 CHIP SCALE PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 PURPOSE: A CSP(Chip Scale Package) and a method for manufacturing the same are provided to improve a reliability and to simplify manufacturing processes without using a bonding process of a metal wire. CONSTITUTION: Each bump ball(106) is attached to a plurality of chip pads(102) formed in a wafer(100). An adhesive(104) is coated to expose the bump balls(106). Through holes(108) are formed in a substrate(120). An interconnection(122) having a metal ring is formed on the substrate(120). A protection layer(136) is formed on the interconnection(122) so as to expose a ball land(124) and the thorough hole(108). The substrate(120) is then bonded to the adhesive(104). A conductive layer(112) is formed on the through hole(108) so as to connect between the bump balls(106) and the interconnection(122). A conductive ball(134) is bonded on the ball land(124). The resultant structure is sawed to a unit chip.
申请公布号 KR20020083572(A) 申请公布日期 2002.11.04
申请号 KR20010022949 申请日期 2001.04.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JAE MYEON
分类号 H01L21/60 主分类号 H01L21/60
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