发明名称 |
Sequential feedback HEC checking method and circuit for asynchronous transfer mode (ATM) |
摘要 |
The present invention provides sequential feedback Header Error Correction (HEC) checking method and circuit for Asynchronous Transfer Mode (ATM). With design of hardware circuit, the present invention of sequential feedback Header Error Correction (HEC) checking method and circuit will allocate the cell boundary in ATM communication, and meanwhile control the state switching among three operation for cell delineation logic, i.e., HUNT, PRESYNC and SYNC.
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申请公布号 |
US2002150105(A1) |
申请公布日期 |
2002.10.17 |
申请号 |
US20020120732 |
申请日期 |
2002.04.11 |
申请人 |
HSIAO PEI-CHIEH;WANG HSIN-MIN;HSIEH HUAN-TANG |
发明人 |
HSIAO PEI-CHIEH;WANG HSIN-MIN;HSIEH HUAN-TANG |
分类号 |
H04L12/56;(IPC1-7):H04L12/28 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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