发明名称 Active termination circuit with an enable/disable
摘要 A termination circuit for use on a conductor of a transmission line. The termination circuit generally comprises a first, second, third and fourth transistor. The first transistor may have (i) a first drain node couplable to the conductor, (ii) a first source node couplable to a first power source presenting a first reference voltage, and (iii) a first gate node. The second transistor may have (i) a second drain node couplable to the conductor, (ii) a second source node couplable to a second power source presenting a second reference voltage, and (iii) a second gate node. The third transistor (i) may have a third source node coupled to the first gate node and (ii) may be configured to bias the first gate node to a first voltage below the first reference voltage. The fourth transistor (i) may have a fourth source node coupled to the second gate node and (ii) may be configured to bias the second gate node to a second voltage above the second reference voltage.
申请公布号 US2002149390(A1) 申请公布日期 2002.10.17
申请号 US20010836994 申请日期 2001.04.17
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 MANAPAT RAJESH;SRINIVASAGAM P. KANNAN
分类号 H03K17/16;H03K19/003;(IPC1-7):H03K17/16 主分类号 H03K17/16
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