| 摘要 |
In a low-power cache memory and a method of determining a hit/miss thereof, a tag is divided into pre-select bits and post-select bits. In a first phase for comparison of the tag, the pre-select bits of the cache memory are compared with pre-select bits of the processor to generate a first hit/miss signal. In the first phase, when the first hit/miss signal is in a miss state, the cache memory discriminates a cache miss. On the other hand, when the first hit/miss signal is in a hit state in the first phase, in a second phase, the post-select bits of the cache memory are compared with tag bits from the processor corresponding to the pre-select bits to generate a second hit/miss signal. Similarly, in the second phase, when the second hit/miss signal is in a hit state, the cache memory discriminates a cache hit.
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