发明名称 Semiconductor device
摘要 In the case of a large capacity DRAM (Dynamic Random Access Memory) of a conventional type, since a signal voltage read out from a memory cell is low, the action thereof is apt to be unstable. If a gain is added to a memory cell to obtain a large output voltage, the area for a memory cell becomes large. Accordingly, a memory cell with RAM action being stable and which requires a small area is needed. A memory cell according to the present invention is provided with MOS transistors 2, 3, 4, 5 to read out storage information, transistors 8 and 11b to write storage information, and a capacitor 11a to control the voltage at the storage node. These component parts are assembled to form a 3-dimensional structure.
申请公布号 US6465834(B1) 申请公布日期 2002.10.15
申请号 US20000516773 申请日期 2000.03.01
申请人 HITACHI, LTD. 发明人 NAKAZATO KAZUO;ITO KIYOO
分类号 H01L21/8242;H01L27/108;(IPC1-7):H01L29/72 主分类号 H01L21/8242
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