发明名称 MEMORY ACCESS DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory access device that can modify the capability of a bus driver according to the setting of the access speed and the number of wait for a memory and halts unnecessary bus signal output at the instant of access termination for realizing optimal power consumption. SOLUTION: In the memory access device, as its constitution, a wait control part 101, output drivers 120 to 135 and an output driver control part 102 are provided, and the output drivers 120 to 135 are individually controlled by output driver control signals 150 to 153 from the output driver control part 102.
申请公布号 JP2002297441(A) 申请公布日期 2002.10.11
申请号 JP20010101526 申请日期 2001.03.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OGISU MIKIO
分类号 G06F12/00;G06F13/16;(IPC1-7):G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址