发明名称 Multi-bank flash ADC array with uninterrupted operation during offset calibration and auto-zero
摘要 A system and method is disclosed for calibrating comparators of an ADC while the ADC continues to operate in an uninterrupted fashion. Groups (banks) of interleaved comparators may be calibrated at random or psuedo-random times while the ADC is performing conversions without the addition of extra "proxy" or replacement comparators. More particularly, at periodic intervals the comparators of one bank may be disconnected from the standard ADC circuitry for calibration or auto-zeroing while the comparators in the remaining bank(s) are left in the data conversion path. In order to prevent a significant degradation in the conversion quality, logic downstream of the comparators provides the necessary adjustments to accommodate for the removal of the comparators and outputs a word of the desired bit length. The multi-bank ADC is particularly advantageous for use with optical data storage systems.
申请公布号 US6459394(B1) 申请公布日期 2002.10.01
申请号 US20010863205 申请日期 2001.05.22
申请人 CIRRUS LOGIC, INC. 发明人 NADI ITANI R.;BAIRD REX;KOSTELNIK MATTHEW M.;WESLEY MOKRY
分类号 H03M1/10;H03M1/36;(IPC1-7):H03M1/10 主分类号 H03M1/10
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