发明名称 |
Integrated circuit interconnect shunt layer |
摘要 |
An integrated circuit and manufacturing method therefor is provided for an integrated circuit on a semiconductor substrate grated circuit having a semiconductor device. A dielectric layer is on the semiconductor substrate and has an opening provided therein. A barrier layer lines the opening, and a first conductor core fills the opening over the barrier layer. A second dielectric layer is formed on the first dielectric layer and has a second channel and via opening provided therein. A shunt layer is in the via opening above the conductor core. A barrier layer lines the second channel and via opening over the shunt layer and the second dielectric layer. A conductor core fills the second channel and via opening over the barrier layer and the first conductor core to form the second channel and via.
|
申请公布号 |
US6455938(B1) |
申请公布日期 |
2002.09.24 |
申请号 |
US20010905479 |
申请日期 |
2001.07.13 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
WANG PIN-CHIN CONNIE;MARATHE AMIT P.;WOO CHRISTY MEI-CHU |
分类号 |
H01L23/522;(IPC1-7):H01L29/45 |
主分类号 |
H01L23/522 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|