发明名称 REFERENCE CLOCK GENERATING DEVICE
摘要 PROBLEM TO BE SOLVED: To enable a voltage value set in a voltage-controlled oscillator to be stored in a storage, such as a memory in a reference clock generating device which resides in a radio base station and synchronizes with the reference clock from a host station by the use of a digital PLL circuit, so as to shorten the time required for tuning of frequency, after the power supply of the radio base station device has been shut off for a moment due to the striking of lighting. SOLUTION: When a phase difference P becomes zero for a certain period of time, an operational unit 105 determines that it is in a phase-locked process, and the digital input value VD at the time is stored in a digital input storage 106. Thereafter, when a failure occurs in a power supply generating unit 109 by an external cause, such as striking of thunderbolt or the like, to momentarily shut off a power supply VBTS which supplies a power to a reference clock generating unit 100, the operational unit 105 reads out the digital input value VD from the digital input storage 106 and sets it in a D/A converter 107, so that a voltage value immediately before the power supply momentarily stops can be set up in a voltage-controlled oscillator 108, a reference clock f0 of the same frequency can be supplied after the power supply is recovered, and a phase-locked process can be maintained.
申请公布号 JP2002271194(A) 申请公布日期 2002.09.20
申请号 JP20010067268 申请日期 2001.03.09
申请人 NEC SAITAMA LTD 发明人 KOSUGI JUNICHI
分类号 H03L7/10;H03L7/093;H03L7/14 主分类号 H03L7/10
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