发明名称 Circuit arrangement and method of protecting at least a chip arrangement from manipulation and/or abuse
摘要 To provide an electric or electronic circuit arrangement (100) and a method of protecting at least a chip arrangement (200), for example, at least a (semiconductor) chip arrangement, particularly at least a controller chip arrangement for a chip card or smart card from manipulation and/or abuse, in which an optical attack by means of light irradiation on a controller chip arrangement itself and on a dielectric coating, particularly an insulating layer and/or passivation layer and/or further protective coating covering the controller chip arrangement for protecting the integrated circuit from external influences, both on the front side of the controller chip arrangement and on the substantially unprotected rear side of the controller chip arrangement can be reliably and permanently averted, at least one, particularly optosensitive detector unit (10), whose output voltage (Vout) is a measure of the incidence of light (Li) on the detector unit (10), and at least one comparator unit (20) preceded by the detector unit (10) provided for comparing the output voltage (Vout) of the detector unit (10) with a reference voltage (Vref), wherein the data and/or functions of the chip arrangement (200) to be protected can be temporarily or permanently obstructed and/or erased (L) and/or blocked (S) and/or interrupted in the case of a failure message occurring during comparison of the output voltage (Vout) of the detector unit (10) with the reference voltage (Vref) are provided.
申请公布号 US2002130248(A1) 申请公布日期 2002.09.19
申请号 US20020056373 申请日期 2002.01.17
申请人 BRETSCHNEIDER ERNST;FUHRMANN JOHANN;EINFELDT WALTER 发明人 BRETSCHNEIDER ERNST;FUHRMANN JOHANN;EINFELDT WALTER
分类号 G06F12/14;G06F21/24;G06K19/07;G06K19/073;G06K19/077;G11C5/14;G11C8/20;H01L23/58;H01L31/11;(IPC1-7):H01J40/14 主分类号 G06F12/14
代理机构 代理人
主权项
地址