发明名称 |
Method for forming a via and interconnect in dual damascene |
摘要 |
A first low-k layer is formed over a structure having an exposed active device. A patterned first nitride layer having an opening therethrough aligned over a portion of the active device is formed. Nitride spacers are formed over the side walls of the opening. A second low-k layer is formed over the patterned first nitride layer, filling the patterned first nitride layer opening. The second low-k layer and the first low-k layer through the opening reduced by the nitride spacers are patterned to expose a portion of the active device to form a preliminary dual damascene. The nitride spacers and the first nitride layer exposed by the preliminary dual damascene opening are removed to form a final upper horizontal interconnect opening having substantially 90° edges. The first and second low-k layers are then reflowed to round the substantially 90° edges of the first and second low-k layer.
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申请公布号 |
US6440847(B1) |
申请公布日期 |
2002.08.27 |
申请号 |
US20010845479 |
申请日期 |
2001.04.30 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY |
发明人 |
LOU CHINE-GIE |
分类号 |
H01L21/768;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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