| 摘要 |
PURPOSE: A method of fabricating MFMOS memory transistors and MFMS memory transistors are provided not to require exceptionally precise etching procedures. CONSTITUTION: An intermediate oxide layer(30) is deposited by CVD, to a thickness which is at least 150 percent thicker than the thickness of electrode plug. Intermediate oxide layer(30) and silicon nitride are smoothed and thinned by chemical mechanical polishing(CMP). The silicon nitride is then wet etched completely to remove the electrode plug. |
