| 摘要 |
The invention relates to a Viterbi decoder, for decoding a received sequence of data symbols, which are encoded by means of a given coding instruction, comprising: (a) a branch metric calculation circuit (5), for the calculation of branch metrics (l) for the received sequence of encoded data symbols;(b) a path metric calculation circuit (9), for the calculation of path metrics (g), depending on the branch metrics (l) and the code instructions, whereby the calculated path metrics are each compared with an adjustable decision threshold value (SW) for generation of a corresponding logical validity value and (c) a selection circuit (20), which temporarily stores each path metric the validity value of which is logically high in a temporary memory and selects the path with the optimal path metric from the temporary stored path metrics.
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