| 摘要 |
A clock circuit on an integrated circuit chip includes a driver having an output for deriving an output clock wave responsive to a clock wave of a clock wave source, a clock line having a first end coupled to the output of the driver, and a receiver having an input coupled to a second end of the clock line. The receiver has a resistive input impedance causing the clock line carrying the output clock wave to the input of the receiver to present to the driver output an impedance having a resistance-capacitance time constant that is a relatively small fraction of a period of the clock wave.
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