发明名称 A METHOD FOR THE IMPLEMENTATION OF ELECTRONIC COMPONENTS IN VIA-HOLES OF A MULTI-LAYER MULTI-CHIP MODULE
摘要 <p>The substrate (2) containing the via-hole (3) is inserted into an electrophoretic cell (1) and an electrode (6) (the 'first electrode') is placed on top of a first orifice of the via-hole(s) (3), to be implemented with electrical component(s), so that the electrode (6) totally covers the first orifice. Electrically charged either conductive and/or non-conductive particles are provided by immersing the volume of the via-hole(s) (3) in a conductive medium (17) consisting of the electrically charged particles. An electric field is created between the first electrode (6) and a second electrode (4) through the via-hole(s) (3) and the conductive medium (17) and the electrically charged particles are precipitated on the inner surface of the first electrode (6) that is directed to the second orifice of the via-hole(s) (3), until a desired portion of the volume of the via-hole(s) (3) is filled with a first layer of the charged particles having a desired thickness. More layers may be created by repeating this process using additional electophoretic cell(s), until remaining portion of the volume of the via-hole(s) (3) is filled with the additional charged particles.</p>
申请公布号 WO2002060229(A1) 申请公布日期 2002.08.01
申请号 IL2001000991 申请日期 2001.10.25
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