| 摘要 |
<p>There is disclosed an improved backplane (210) architecture for devices such as processors (170) and modems (140) used in wireless, cable, and wired voice frequency (VF) access systems (100). The present invention comprises a backplane (210)comprising (1) a low tier (410)that is capable of aggregate traffic rates of up to approximately two gigabits per second, and (2) a high tier (415) that is capable of aggregate traffic rates of up to approximately twenty gigabits per second. The backplane (210) of the present invention also comprises a plurality of bus structures (510, 520, 530) and clock and framing resources (540). The backplane (210) of the present invention is capable of being used in more than one type of electronic equipment.</p> |
