发明名称 Method for fabricating stacked chip package
摘要 A method for fabricating a stacked chip package comprises the steps of: (a) attaching a lower chip to a substrate or a lead frame; (b) electrically coupling the lower chip to the substrate or the lead frame; (c) providing a dummy chip with a film adhesive on a upper surface thereof; (d) attaching the dummy chip to the lower chip through an adhesive layer wherein a lower surface of the dummy chip is in contact with the adhesive layer; (e) attaching an upper chip to the dummy chip through the film adhesive; (f) electrically coupling the upper chip to the substrate or the lead frame; and (g) encapsulating the lower chip and the upper chip against a portion of the substrate or the lead frame with a molding compound. Since the dummy chip is bonded to the upper chip via a film adhesive, it is not necessary to monitor the thickness of the film adhesive after the upper chip is bonded to the dummy chip.
申请公布号 US2002090753(A1) 申请公布日期 2002.07.11
申请号 US20010754293 申请日期 2001.01.05
申请人 ADVANCED SEMICONDUCTOR ENGINEERING INC. 发明人 PAI TSUNG-MING;PAO CHIH MIN;CHEN KUANG-HUI
分类号 H01L25/065;(IPC1-7):H01L21/44;H01L21/48;H01L21/50 主分类号 H01L25/065
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