发明名称 |
Controlled anneal conductors for integrated circuit interconnects |
摘要 |
A method is provided for manufacturing an integrated circuit on a semiconductor wafer having a semiconductor substrate with a semiconductor device thereon. A dielectric layer is formed on the semiconductor substrate and an opening is formed in the dielectric layer. A barrier layer is deposited to line the opening. A seed layer is deposited on the barrier layer and securely bonds to the barrier layer. A conductor layer is deposited to fill the channel opening over the barrier layer. A planarization technique is used to planarize the barrier, seed layer, and conductor layers to be coplanar with the dielectric layer to form a conductor channel. The semiconductor wafer is then subjected to a two step timed anneal. |
申请公布号 |
AU3974202(A) |
申请公布日期 |
2002.07.01 |
申请号 |
AU20020039742 |
申请日期 |
2001.10.23 |
申请人 |
ADVANCED MICRO DEVICES INC. |
发明人 |
STEVEN C. AVANZINO;PIN-CHIN CONNIE WANG;MINH VAN NGO |
分类号 |
H01L21/288;H01L21/768 |
主分类号 |
H01L21/288 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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