发明名称 |
Register file circuitry |
摘要 |
Register file circuitry, for use in a processor or processor core, comprises a plurality of physical registers (320-32D-1) and a plurality of tag storing portions (340-34D-1) corresponding respectively to the physical registers. Each tag storing portion stores a tag representing a logical register ID allocated to the corresponding physical registers. A register selection unit (36) receives a logical register ID (R) and selects that one of the logical registers whose tag matches the received logical register ID. A tag changing unit (38) changes the stored tags so as to change a mapping between at least one physical register ID and one of the physical registers. Such register file circuitry can permit a mapping between logical register IDs and physical registers to be changed quickly and efficiently and can permit a desired physical register to be selected quickly.
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申请公布号 |
US2002083293(A1) |
申请公布日期 |
2002.06.27 |
申请号 |
US20010998802 |
申请日期 |
2001.11.01 |
申请人 |
HARRIS JONATHAN MICHAEL;WISE ADRIAN PHILIP;TOPHAM NIGEL PETER |
发明人 |
HARRIS JONATHAN MICHAEL;WISE ADRIAN PHILIP;TOPHAM NIGEL PETER |
分类号 |
G06F9/30;G06F9/34;G06F9/38;(IPC1-7):G06F12/00 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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