发明名称 Circuit and method thereof for correcting over-erased flash memory cells
摘要 A flash memory circuit has a flash memory array and a processor. The flash memory array has a plurality of erasable flash memory cells. Each of the flash memory cells is electrically connected to a corresponding bitline. If any over-erased flash memory cell exists in the flash memory array, a processor controls the flash memory circuit to apply a correction voltage to the bitline connected to the over-erased flash memory cell so as to correct the over-erased flash memory cell. The correction voltage is continuously applied until a current along the corresponding bitline drops below a predetermined value.
申请公布号 US6407948(B1) 申请公布日期 2002.06.18
申请号 US20010683079 申请日期 2001.11.15
申请人 AMIC TECHNOLOGY (TAIWAN) INC. 发明人 CHOU KUO-YU
分类号 G11C16/34;(IPC1-7):G11C16/34 主分类号 G11C16/34
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