发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY AND ITS OPERATION METHOD
摘要 <p>PROBLEM TO BE SOLVED: To solve such a problem that a time required for automatic erasure is not shortened without improving a cell characteristic. SOLUTION: An erasure permission signal is set to erasure registers 37, 38 corresponding to a block to be erased. When an initial block is erased in accordance with the erasure permission signal set to the erasure registers 37, 38, all residual blocks being object of erasure are erased en bloc in accordance with the erasure permission signal set to the erasure registers 37, 38. Thereby, erasure is performed by a time of one block in erasure sequence of all blocks.</p>
申请公布号 JP2002170389(A) 申请公布日期 2002.06.14
申请号 JP20010199771 申请日期 2001.06.29
申请人 TOSHIBA CORP 发明人 HARA NORIMASA;SAITO SAKATOSHI;KATO HIDEO
分类号 G11C16/02;G11C16/06;G11C29/00;G11C29/04;(IPC1-7):G11C16/02 主分类号 G11C16/02
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