Direct-downset flip-chip package assembly and method of fabricating the same

摘要

A new flip-chip technology, denominated as DDFC (Direct-Downset Flip-Chip) technology, is proposed, which is characterized by the forming of a downset device hole in the substrate and by the use of an array of solder bumps over the semiconductor chip and an array of recessed solder-bump pads of an inwardly-tapered conic shape over the bottom surface of the device hole for bonding the semiconductor chip to the substrate. During assembly, the semiconductor chip is embedded in a direct-downset manner into the device hole of the substrate, with the solder bumps being fitted and wetted to the recessed solder-bump pads. The proposed DDFC technology has the following advantages: (1) allows the packaging process to be implemented without the necessity of solder-deflux and flip-chip underfill steps; (2) allows more reliable electrically coupling between the flip chip and the substrate; (3) allows an increased heat-dissipation efficiency to the flip-chip package; (4) allows the package size to be made smaller in height; (5) allows the prevention of short-circuiting between adjacent solder bumps during solder-reflow process; and (6) allows the minimization of structural damage by thermal stress due to CTE mismatch between the semiconductor chip and the substrate.