| 摘要 |
PROBLEM TO BE SOLVED: To provide a DRAM of an SRAM type interface from which a timing rule to addresses is removed. SOLUTION: The semiconductor storage device includes a latch circuit for latching an address signal supplied from the external, a core circuit including a memory capacitor for executing access operation corresponding to an address stored in the latch circuit and a latch timing control circuit for previously storing that the address signal is changed in the operation of the core circuit and allowing the latch circuit to latch the changed address signal after the end of the operation of the core circuit.
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