发明名称 METHOD FOR FABRICATING TEST PATTERN FOR MEASURING SIDEWALL CAPACITANCE AND LEAKAGE CHARACTERISTIC OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for fabricating a test pattern is provided to measure sidewall capacitance and a leakage current characteristic of a semiconductor device, by forming a bit line of a surpentine structure on a wafer, by forming a sidewall in the surpentine structure and by filling an electrode material to form an upper electrode. CONSTITUTION: A bit line(20) and a bit line sidewall(30) are formed on a wafer(10). A metal contact for connecting an electrode is formed at both ends of the bit line. A plug filling material is applied on the entire surface including the metal contact. The plug filling material is patterned to form the upper electrode.
申请公布号 KR20020038248(A) 申请公布日期 2002.05.23
申请号 KR20000068353 申请日期 2000.11.17
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, SEONG UNG
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
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