发明名称 INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a boundary test architecture usable for executing a boundary test in an integrated circuit when the integrated circuit is in an operation mode, and especially its integrated circuit. SOLUTION: This integrated circuit is equipped with a first resistor for storing data synchronously with timing introduced from a serial scanning clock, a second register for storing data synchronously with timing introduced from a functional clock separated from the serial scanning clock, a bus of a signal lead wire connected between the first resistor and the second register in order to carry the data stored in the first resistor to the second register, and a synchronizer circuit operated in order to control the time when the second register stores the data from the first resistor.
申请公布号 JP2002148312(A) 申请公布日期 2002.05.22
申请号 JP20010268996 申请日期 2001.09.05
申请人 TEXAS INSTR INC <TI> 发明人 WHETSEL LEE D
分类号 G01R31/28;B42D15/00;G01R31/317;G01R31/3185;G06F11/22;H01L21/66;H01L21/822;H01L27/04 主分类号 G01R31/28
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