| 摘要 |
PURPOSE: A method for fabricating a capacitor of a semiconductor device is provided to increase capacitance by increasing the surface area of an amorphous silicon layer where a hemispherical grain(HSG) is to grow, and to improve step coverage between a memory cell and a peripheral area by decreasing the height of the storage node electrode. CONSTITUTION: An interlayer dielectric(32) and a nitride layer(33) are sequentially deposited on a semiconductor substrate(31). The nitride layer and the interlayer dielectric are selectively removed to expose a predetermined portion of the surface of the substrate so that a contact hole is formed. A conductive plug is formed inside the contact hole. An oxide layer is formed. The oxide layer is selectively eliminated to expose the surface of the conductive plug and the nitride layer adjacent to the conductive plug so that a capacitor region is defined. The first amorphous silicon layer and a spin-on-glass(SOG) layer are sequentially deposited. The SOG layer is selectively eliminated to expose a predetermined portion of the surface of the first amorphous silicon layer formed in the capacitor region so that a contact hole is formed. The second amorphous silicon layer is formed inside the contact hole. The oxide layer is removed and remains only in the capacitor region. The first and second amorphous silicon layers are selectively removed. The oxide layer and the SOG layer are removed. An HSG layer(41) is formed on the first and second amorphous silicon layer. A dielectric layer(42) and a plate electrode(43) are formed.
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