发明名称 |
Architecture and apparatus for implementing 100 Mbps and GBPS Ethernet adapters |
摘要 |
An architecture and NIC (Network Interface Card) for coupling Data Processing Equipment to a communications network includes a host memory having a High Priority Queue storing control information and data, a Low Priority Queue storing control information and data. Control registers, in the NIC, store addresses identifying the location of said Queues and a block size register, in the NIC, stores a value representing the size of data blocks to be transferred from the host memory to the NIC. A controller transfers allowable block size data from the host memory to buffers on said NIC.
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申请公布号 |
US6393457(B1) |
申请公布日期 |
2002.05.21 |
申请号 |
US19980114761 |
申请日期 |
1998.07.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ALLISON SAMUEL STEVEN;BARKER KENNETH JAMES;LEE JOSEPH KINMAN |
分类号 |
H04L12/56;(IPC1-7):H04J3/14 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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