| 摘要 |
PROBLEM TO BE SOLVED: To prevent occupation of a common bus by a bus access request having the same priority level. SOLUTION: This arbitration circuit is provided with a storage part 4 storing the latest permission state (the state of first and second bus access permission PM1 and PM2) to first and second bus access requests RQ1 and RQ2. In a control circuit 2, logical operation between the latest permission state inputted from the storage part 4 and first and second bus access requests RQ1' and RQ2' synchronized with clock signals CLK inputted from first and second D flip-flops 1a and 1b is carried out, and a bus access to the same bus access request is not allowed continuously until a bus access request having another priority level is allowed. In this way, occupation of a common bus by the bus access request having the same priority level can be prevented.
|
