发明名称 |
Method for forming metal wire interconnection in semiconductor devices using dual damascene process |
摘要 |
A method for preventing a diffused reflection from being generated in patterning a via hole for the metal interconnection is disclosed. The disclosed method includes: forming an insulation layer on a semiconductor substrate, wherein elements for operating a semiconductor device are formed on the semiconductor substrate; forming first photoresist patterns on the insulation layer; etching the insulation layer in order to form a first via hole using the first photoresist patterns and then forming a resulting structure; coating a first anti-reflecting coating layer on the resulting structure with a low viscosity; coating a second anti-reflecting coating layer on the resulting structure with a low viscosity; forming second photoresist patterns on the second anti-reflecting coating layer; and forming a second via hole using the second photoresist patterns.
|
申请公布号 |
US2002058370(A1) |
申请公布日期 |
2002.05.16 |
申请号 |
US20010934499 |
申请日期 |
2001.08.22 |
申请人 |
LEE YOUNG-MO;PARK JEONG-KWEON |
发明人 |
LEE YOUNG-MO;PARK JEONG-KWEON |
分类号 |
G03F7/11;G03F7/26;G03F7/40;H01L21/027;H01L21/302;H01L21/3065;H01L21/311;H01L21/3205;H01L21/768;(IPC1-7):H01L21/823 |
主分类号 |
G03F7/11 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|