发明名称 LOGIC SIMULATION SYSTEM AND INPUT/OUTPUT CONTROLLER
摘要 PROBLEM TO BE SOLVED: To enable a user to easily and efficiently perform logic simulation and analysis without paying any attention to a troublesome procedure nor operation. SOLUTION: This logic simulation system which displays the result of logic simulation on a screen is equipped with a result display control means which displays on the screen logic simulation result information in free-format display form displaying signal values of signal terminals only at specified time and logic simulation result information in stream display format as the time-series display format of signal values of the signal terminals including the specified time.
申请公布号 JP2002132849(A) 申请公布日期 2002.05.10
申请号 JP20010264687 申请日期 2001.08.31
申请人 FUJITSU LTD 发明人 SATO AKIKO
分类号 G01R31/28;G06F17/50;(IPC1-7):G06F17/50 主分类号 G01R31/28
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