SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH TEST POINT INSERTED THERETO

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device with test point inserted thereto capable of improving the test easiness to the full and minimizing the deterioration of performance by insertion of a test point and an additional overhead such as increase in required area or the like. SOLUTION: This device includes a logic circuit 220 including a number of observation points and adjustment points; a scan cell unit 20 connected to the logic circuit; a first multiplexer 240 for selecting any one of normal data provided from the logic circuit and data provided from one or more observation points; and a second multiplexer 250 for outputting any one of the normal data provided from the logic circuit and scan data transmitted from the scan cell unit to the adjustment point. The test point is inserted by use of the scan cell provided within the semiconductor integrated circuit device.