发明名称 Method of forming a self-aligned shallow trench isolation
摘要 A method for fabricating a semiconductor device, for example a non-volatile memory device having a stacked gate (memory cell) consisting of a floating gate, a control gate deposited over the floating gate, and a dielectric interlayer interposed between them, comprises the steps of sequentially depositing: a tunnel oxide layer, a first polysilicon layer for the floating gate, and a nitride layer over a semiconductor substrate, sequentially etching the nitride layer, first polysilicon layer, and semiconductor substrate to form a trench, depositing an oxide layer over the substrate to fill the trench, removing the oxide layer to the level of the nitride layer to attain a field region of the trench isolation, removing the nitride layer, subjecting the field region to a wet-chemical treatment, and depositing a second polysilicon layer for the floating gate over the substrate.
申请公布号 US2002048897(A1) 申请公布日期 2002.04.25
申请号 US20010864627 申请日期 2001.05.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HONG UK-SUN
分类号 H01L21/8247;H01L21/76;H01L21/762;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/76 主分类号 H01L21/8247
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