发明名称 A/D CONVERTING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the non-linear error of digital data being an A/D converted result for a voltage signal to be A/D converted, and to quickly perform the A/D conversion of a plurality of voltage signals whose voltage levels are switched in an A/D converting circuit using a ring gate delay circuit. SOLUTION: In a ring gate delay circuit 10 constituted by connecting inverting circuits like a ring, a voltage signal Vin to be A/D converted is applied as a power supply voltage, and the circulating time of a pulse signal circulating in the ring of the inverting circuits is changed according to the size of the voltage signal Vin. Then, an encoding processing block 3 for encoding the number of times of the circulation and circulating position of the pulse signal circulating in the ring gate delay circuit 10 is driven with a fixed voltage different from a voltage signal Vin based on an output from the ring gate delay circuit 10.
申请公布号 JP2002118467(A) 申请公布日期 2002.04.19
申请号 JP20000310652 申请日期 2000.10.11
申请人 DENSO CORP 发明人 NISHII KATSUMASA;WATANABE TAKAMOTO
分类号 H03M1/64;H03M1/10;H03M1/14;H03M1/50;(IPC1-7):H03M1/64 主分类号 H03M1/64
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