发明名称 MATRIX ARRAY SUBSTRATE
摘要 <p>PROBLEM TO BE SOLVED: To provide a flat display device of which the disconnection failure of a signal line can be prevented sufficiently, and also the yield of manufacture can be prevented from decreasing, caused by a short circuit across a counter substrate at a crossing part 7 of a scanning line 11 and a signal line 8, in a matrix array substrate used for the flat display device or the like. SOLUTION: The signal line 8 is made to be of a redundant wiring structure comprising signal line lower layer wiring 31 as main wiring formed of a metal, and signal line upper layer wiring 51 as auxiliary wiring, and also the signal line upper layer wiring 51 is omitted at the point of the crossing part 7. Namely, the signal line upper layer wiring 51 as the auxiliary wiring is arranged so as to form a strip-like part 52a continuous in each area held between adjacent scanning lines 11. Contact holes 41, 42 for bringing the signal line lower layer wiring 31 and the signal line upper layer wiring 51 into conduction are arranged at both end parts of the strip-like part 51a.</p>
申请公布号 JP2002108245(A) 申请公布日期 2002.04.10
申请号 JP20000294765 申请日期 2000.09.27
申请人 TOSHIBA CORP;TOSHIBA ELECTRONIC ENGINEERING CORP 发明人 MORIMITSU ATSUSHI
分类号 G02F1/1333;G02F1/136;G02F1/1368;G09F9/30;H01L21/768;H01L23/522;H01L29/786;(IPC1-7):G09F9/30;G02F1/133 主分类号 G02F1/1333
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