Non volatile ferroelectric memory device

摘要

The ferroelectric memory device comprises a thin film transistor (TFT) 20 stacked over a ferroelectric capacitor 30. A plate line connection is provided to the ferroelectric capacitor plate 35 and separate bit line connections BL1 and BL2 are provided to the source and drain regions 22,23 of the TFT. Binary data is stored by applying appropriate voltages to the first and second bitlines, the gate electrode, and the capacitor plate electrode. Data is read from the device by utilizing the electrostatic effects on the channel region of the charge stored in the ferroelectric capacitor structure. When the data is read the ferroelectric capacitor is not discharged.