发明名称 |
System and method for synchronizing a register stack engine (RSE) and backing memory image with a processor's execution of instructions during a state saving context switch |
摘要 |
A computer implemented method in a processor to perform a backing store switch from a first context (source context) to a second context (target context) is provided whereby the backing store memory image and RSE will be synchronized with the processor's execution of instructions. The processor includes a register stack (RS) device that includes a portion allocated for dirty registers. The portion is defined by first and second physical register numbers. The processor further includes a register stack engine (RSE) to exchange information in one of an instruction execution dependent and independent modes between a storage area and the RS. The processor further includes a FLUSHRS state machine to notify the RSE to store dirty register in the RS to a backing store located in a memory.
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申请公布号 |
US6367005(B1) |
申请公布日期 |
2002.04.02 |
申请号 |
US20000677617 |
申请日期 |
2000.10.02 |
申请人 |
IDEA CORPORATION OF DELAWARE |
发明人 |
ZAHIR ACHMED RUMI;ROSS JONATHAN K. |
分类号 |
G06F9/30;G06F9/40;(IPC1-7):G06F9/48 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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