| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the dispersion of an erasure level, to improve the capability of a transistor, and to enable low voltage operation, in a non-volatile semiconductor memory. SOLUTION: When a state conforming operation is performed in memory cells 1-1, 1-2, 2-1, 2-2 in a block being a unit of erasure processing, the output SAO of a sense amplifier 3 is sent to a first matrix upper position storage circuit 9 and a second matrix upper position storage circuit 10, and their write-in states are stored in individual latch circuits 9-1, 9-2, or the like, individual latch circuits 10-1, 10-2, or the like corresponding to a memory cell of a write-in state. Erasure processing is performed making a memory cell of only matrix specified in an individual latch circuit in which a write-in state is stored as an object, the operation is repeated until memory cells being in a write-in state are used up.</p> |
