| 摘要 |
PURPOSE: A dynamic arbitration logic of a link controller in an exchange system is provided to reduce access time to a shared memory of each link controller and increase the efficiency of signal links by dynamically applying an arbitration scheme considering a number of signal links assigned within a board. CONSTITUTION: A CPU(21) exchanges signals with a plurality of link controllers(23) through a shared memory(22). The shared memory(22) stores the signals exchanged between the CPU(21) and the plurality of link controllers(23). The plurality of link controllers(23) control signal links by being assigned with a turn from an arbitration logic(24) and exchange the signals with the CPU(21) through the shared memory(22). The arbitration logic(24) receives bus request of the plurality of link controllers(23) for assigning the turn.
|
