发明名称 Epitaxial template and barrier for the integration of functional thin film heterostructures on silicon
摘要 A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of doped strontium titanate, whether cationically substituted, such by lanthanum or niobium for strontium and titanium respectively, or anionically deficient, is epitaxially grown over the silicon, and a lower metal oxide electrode layer, a ferroelectric layer and an upper metal oxide electrode layer are epitaxially grown on the barrier layer. No platinum barrier is needed beneath the ferroelectric stack. The invention can be applied to many other functional oxide materials of the Ruddlesden-Popper and devices including micromachined electromechanical (MEM) devices and ferromagnetic tri-layer devices.
申请公布号 AU8855501(A) 申请公布日期 2002.03.13
申请号 AU20010088555 申请日期 2001.08.30
申请人 UNIVERSITY OF MARYLAND;THE PENN STATE RESEARCH FOUNDATION 发明人 RAMAMOORTHY RAMESH;DARRELL G. SCHLOM
分类号 G11C11/22;H01L;H01L21/02;H01L21/285;H01L21/8246;H01L27/115;H01L29/12;H01L29/51;H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 G11C11/22
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